In FX3, how to configure the GPIF II for slave FIFO 8 bit operation.
GPIF II Designer has the "Data bus width" option to select 8 bit bus.
Thanks for you reply.
I will select "Data bus witdth" as 8 bit in GPIF II designer.
In addition to Data bus width, in SlaveFifoSync example, io_cfg.isDQ32Bit and io_cfg.lppMode variables are assigned as below to select either 16 bit or 32 bit operation.
#if (CY_FX_SLFIFO_GPIF_16_32BIT_CONF_SELECT == 0)
io_cfg.isDQ32Bit = CyFalse;
io_cfg.lppMode = CY_U3P_IO_MATRIX_LPP_UART_ONLY;
io_cfg.isDQ32Bit = CyTrue;
io_cfg.lppMode = CY_U3P_IO_MATRIX_LPP_DEFAULT;
here my doubt is which values I should assign to io_cfg.isDQ32Bit and io_cfg.lppMode variables for 8 bit operation.
You should be going with the configuration similar to 16-bit bus.
Thanks for the clarification.