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Slave FIFO 2 bit read issue(Very Urgent)

Summary: 11 Replies, Latest post by raj8889 on 20 May 2013 02:23 AM PDT
Verified Answers: 0
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raj8889's picture
User
57 posts

 Hello Cypress team,

I have an issue with slave fifo 2 bit read. I want to burst read data from FX3.

When I send data from host pc I see the flag(dedicated flag) working properly. But I always read only this value(0x200000FF)   or (0x2000FFFF).

This is how I send my control signals from FPGA

IDLE status

Address <= "11";

SLRD <= 1;

SLOE <= 1;

SLCS <= 0;

SLWR <= 1;

PKTEND <= 1;

when flag goes high at rising edge

 

Address <= "11";

SLRD <= 0;

SLOE <= 0;

SLCS <= 0;

SLWR <= 1;

PKTEND <= 1;

 

Is there any problem in this case ??

My dma settings are AUTO_DMA

and I have also increased the clock speed of FX3 above 400 Mhz by changing clkcfg

 

ANy suggestions guys

Regards

Pruthvi

 

raj8889's picture
User
57 posts

 Hii Guys,

Forgot to inform somethings. Fx3_Clk which I sent from FPGA is 100 Mhz and gpif 2 state machine(32 bit) I am using is from the example ones provided by cypress.

right now whatever may be the data I sent from HOST pc I recieve 0x20000000 mostly some times some random number

but the 4 MSB remain constant all the time.

Hope it makes things a bit clear.

Regards
Pruthvi
rskv's picture
Cypress Employee
1134 posts

Hi Pruthvi,

What is the PIB consumer socket number that you are using in the firmware.

Thanks,
sai krishna.

rskv's picture
Cypress Employee
1134 posts

Hi Pruthvi,

One more thing,
please create a tech support case if some thing is really urgent. One of our engineers will own the case and provide you the timely response.
I am not sure whether you already aware of the procedure to create a tech support case. If not, please let me know. I will help you in that.

Thanks,
sai krishna.

raj8889's picture
User
57 posts

Hello RSKV,

Thanks for the reply.

These are my defenitions for endpoints , usb sockets and GPIF sockets

#define CY_FX_EP_PRODUCER 0x01 /* EP 1 OUT */
#define CY_FX_EP_CONSUMER 0x81 /* EP 1 IN */

#define CY_FX_PRODUCER_USB_SOCKET CY_U3P_UIB_SOCKET_PROD_1 /* USB Socket 1 is producer */
#define CY_FX_CONSUMER_USB_SOCKET CY_U3P_UIB_SOCKET_CONS_1 /* USB Socket 1 is consumer */

/* Used with FX3 Silicon. */
#define CY_FX_PRODUCER_PPORT_SOCKET CY_U3P_PIB_SOCKET_0 /* P-port Socket 0 is producer */
#define CY_FX_CONSUMER_PPORT_SOCKET CY_U3P_PIB_SOCKET_2 /* P-port Socket 2 is cons

 

I have a dedicated flag for thread 2 it works fine but as I told you in a previous case when I need to transfer 1024 bytes or multiple of it, doesnt work.

Regards

Pruthvi

rskv's picture
Cypress Employee
1134 posts

Hi Pruthvi,

Can you try changing the value that you are driving on the address bus as shown below.
Address <= "10";
Please do this change in two places where you are driving the address to read data from FX3.

Thanks,
sai krishna.

raj8889's picture
User
57 posts

Hii RSKV,

Sorry it was my mistake.

I actually have access to only  one address bit that is I can set the address to 2 or 0. I can access only the MSB bit and by default the LSB bit is always zero '0'

So at the moment my address which I have set already is '10'.

Regards

Pruthvi

 

rskv's picture
Cypress Employee
1134 posts

  Hi,

Please check whether you have this piece of code in main function of FX3 firmware. If not, please add it.

CyU3PSysClockConfig_t clkCfg = {

                        CyTrue,

                        2, 2, 2,

                        CyFalse,

                        CY_U3P_SYS_CLK

    };

 

    /* Initialize the device */

    status = CyU3PDeviceInit (&clkCfg);

    if (status != CY_U3P_SUCCESS)

    {

        goto handle_fatal_error;

    }

Thanks,

sai krishna.

 

raj8889's picture
User
57 posts

Hello RSKV,

I have those settings already can you check my end point and dma settings may be I think there is a problem here.

Burst_len_downstream or upstream = 16;uint16_t size = 0;CyU3PEpConfig_t epCfg;CyU3PDmaChannelConfig_t dmaCfg;CyU3PReturnStatus_t apiRetStatus = CY_U3P_SUCCESS;CyU3PUSBSpeed_t usbSpeed = CyU3PUsbGetSpeed();/* First identify the usb speed. Once that is identified,

 

 

/* Based on the Bus Speed configure the endpoint packet size */

 

{

 

size = 64;

 

 

 

size = 512;

 

 

 

size = 1024;

 

 

 

 

CyFxAppErrorHandler (

 

}

 

 

switch (usbSpeed)case CY_U3P_FULL_SPEED:break;case CY_U3P_HIGH_SPEED:break;case CY_U3P_SUPER_SPEED:break;default:CyU3PDebugPrint (4, "Error! Invalid USB speed.\n");CY_U3P_ERROR_FAILURE);break;if(size == 64) return; // USB 1.1 is not supported

 

 

epCfg.

epCfg.

epCfg.

epCfg.

epCfg.

 

 

epCfg.

}

 

 

CyU3PMemSet ((uint8_t *)&epCfg, 0, sizeof (epCfg));enable = CyTrue;epType = CY_U3P_USB_EP_BULK;burstLen = 1;streams = 0;pcktSize = size;if (usbSpeed == CY_U3P_SUPER_SPEED){burstLen = BURST_LEN_DOWNSTREAM;/* Producer endpoint configuration */

apiRetStatus =

 

{

 

CyFxAppErrorHandler (apiRetStatus);

}

 

 

epCfg.

}

 

 

CyU3PSetEpConfig(CY_FX_EP_PRODUCER, &epCfg);if (apiRetStatus != CY_U3P_SUCCESS)CyU3PDebugPrint (4, "CyU3PSetEpConfig failed, Error code = %d\n", apiRetStatus);if (usbSpeed == CY_U3P_SUPER_SPEED){burstLen = BURST_LEN_UPSTREAM;/* Consumer endpoint configuration */

apiRetStatus =

 

{

 

CyFxAppErrorHandler (apiRetStatus);

}

 

 

* DMA size is set based on the USB speed. */

CyU3PSetEpConfig(CY_FX_EP_CONSUMER, &epCfg);if (apiRetStatus != CY_U3P_SUCCESS)CyU3PDebugPrint (4, "CyU3PSetEpConfig failed, Error code = %d\n", apiRetStatus);/* Create a DMA MANUAL channel for U2P transfer.

 

dmaCfg.

if (usbSpeed == CY_U3P_SUPER_SPEED){size = size;//*BURST_LEN_DOWNSTREAM;

}

 

dmaCfg.

}

dmaCfg.

dmaCfg.

dmaCfg.

dmaCfg.

 

else{size = size;count = CY_FX_SLFIFO_DMA_BUF_COUNT;prodSckId = CY_FX_PRODUCER_USB_SOCKET;consSckId = CY_FX_CONSUMER_PPORT_SOCKET;dmaMode = CY_U3P_DMA_MODE_BYTE;/* Enabling the callback for produce event. */

dmaCfg.

dmaCfg.

dmaCfg.

dmaCfg.

dmaCfg.

dmaCfg.

 

apiRetStatus =

 

 

{

 

CyFxAppErrorHandler(apiRetStatus);

}

 

 

notification = CY_U3P_DMA_CB_PROD_EVENT;cb = CyFxSlFifoUtoPDmaCallback;prodHeader = 0;prodFooter = 0;consHeader = 0;prodAvailCount = 0;CyU3PDmaChannelCreate (&glChHandleSlFifoUtoP,CY_U3P_DMA_TYPE_AUTO, &dmaCfg);if (apiRetStatus != CY_U3P_SUCCESS)CyU3PDebugPrint (4, "CyU3PDmaChannelCreate failed, Error code = %d\n", apiRetStatus);/* Create a DMA MANUAL channel for P2U transfer. */

 

dmaCfg.

}

 

dmaCfg.

}

dmaCfg.

dmaCfg.

dmaCfg.

apiRetStatus =

 

 

{

 

CyFxAppErrorHandler(apiRetStatus);

}

 

 

if (usbSpeed == CY_U3P_SUPER_SPEED){size = size*BURST_LEN_UPSTREAM;else{size = size;prodSckId = CY_FX_PRODUCER_PPORT_SOCKET;consSckId = CY_FX_CONSUMER_USB_SOCKET;cb = CyFxSlFifoPtoUDmaCallback;CyU3PDmaChannelCreate (&glChHandleSlFifoPtoU,CY_U3P_DMA_TYPE_AUTO, &dmaCfg);if (apiRetStatus != CY_U3P_SUCCESS)CyU3PDebugPrint (4, "CyU3PDmaChannelCreate failed, Error code = %d\n", apiRetStatus);/* Flush the Endpoint memory */

 

 

 

 

CyU3PUsbFlushEp(CY_FX_EP_PRODUCER);CyU3PUsbFlushEp(CY_FX_EP_CONSUMER);/* Set DMA channel transfer size. */

apiRetStatus =

 

{

 

CyFxAppErrorHandler(apiRetStatus);

}

apiRetStatus =

 

{

 

CyFxAppErrorHandler(apiRetStatus);

}

 

 

CyU3PDmaChannelSetXfer (&glChHandleSlFifoUtoP, CY_FX_SLFIFO_DMA_TX_SIZE);if (apiRetStatus != CY_U3P_SUCCESS)CyU3PDebugPrint (4, "CyU3PDmaChannelSetXfer Failed, Error code = %d\n", apiRetStatus);CyU3PDmaChannelSetXfer (&glChHandleSlFifoPtoU, CY_FX_SLFIFO_DMA_TX_SIZE);if (apiRetStatus != CY_U3P_SUCCESS)CyU3PDebugPrint (4, "CyU3PDmaChannelSetXfer Failed, Error code = %d\n", apiRetStatus);/* Update the status flag. */

glIsApplnActive = CyTrue;

CyU3PSetGpioOutput(FPGA_INIT_N, CyFalse, CyTrue);

// Start FPGA

}

 

 

 

 

 

 

 

* create a DMA channel and start the transfer on this. */

raj8889's picture
User
57 posts

Sry for the previous message.

I have attached my code now

raj8889's picture
User
57 posts

Hello RSKV,

I would like to know I am using a NEC host controller does it make a difference and I presently sending FX3 100 Mhz clock.

Regards

Pruthvi

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