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Reliability problems with reading data from slave fifo interface | Cypress Semiconductor

Reliability problems with reading data from slave fifo interface

Summary: 1 Reply, Latest post by sodafarl on 02 May 2012 12:25 PM PDT
Verified Answers: 0
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Sil's picture
93 posts

I am now working with the FX3 for quite some time and while there are a lot of good things to say about, I see one big problem that continues to bugger me during the whole development.


This problem is the tendency of the FX3 to crash whenever something goes wrong with the host reading data from the slave fifo interface. As discussed in this forum before, if you request less or more bytes with the XferData() function that there are actually available in the input buffer, the upstream link stalls and seems to recover only with a hardware reset of the FX3. While I am taking extra care to avoid such conditions, in real applications we will always have situations where the requested bytes are not matching with the ones available in the buffer.


I have now encountered another problem that is likely to be related to the above topic. I have an application that is reading data from the slave fifo with maximum performance using overlapped data transfers. At the same time, small amounts of data are written to the slave fifo interface to send memory read requests to the FPGA. In this configuration I can reach more than 300 MB/s upstream performance. I have tested this using an ASmedia controller that is integrated on a mainboard and a Renesas/Nec 720700 PCIe host controller. In both setups, everything seems to work fine and data is transferred without problems for hours or even days. I have now tested the same application using a Lenovo T420s laptop with an on-board 720700 host controller and the latest driver software. The performance is nearly the same but after 10…60 minutes no data can be read anymore and the FX3 upstream link stalls until a hardware reset on the FX3 is carried out. On the slave fifo interface I can see that FLAGB indicates buffer full, so data should be available.


I have attached a JTAG debugger and found that the FX3 operating system is still working. In fact I am using auto DMA transfer mode and therefore I can even stop the application running on the FX3 and my demo application can still work. Therefore I suspect that the DMA engine in the FX3 gets stuck.  At this point I am wondering if there are some different software settings for the FX3 I could try or if there is a problem with the NEC host controller working with the FX3 chip.

sodafarl's picture
133 posts


See my reply to something that may be related

Is your FX3 part an engineering sample or production part. Regarding the data stalling I had a similar problem and put a USB 3 analyser on the bus. I noticed that if the data transfer failed for whatever reason the driver in the host would only retry the data transfer twice - after this it no longer tried to get data from the endpoint unless I reset the endpoint in software. I only had to reset it in the software application. It looks like the DMA engine in the FX3 is ok it is the software that is stuck.


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