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Questions about DR_DATA and IN_DATA in GPIF DESIGNER | Cypress Semiconductor

Questions about DR_DATA and IN_DATA in GPIF DESIGNER

Summary: 2 Replies, Latest post by 291216217_1677336 on 23 May 2017 05:21 AM PDT
Verified Answers: 1
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291216217_1677336's picture
User
24 posts

Hi,all

I would like to use GPIF DESIGNER to read and write NANDFLASH. I found that when I use DR_DATA and IN_DATA to 

drive the data bus, the length of time and interval can not be changed, and I do not need such a long time.As a result I can not exactly optimize the timing of the design as I need.Can I change length of time when drive data bus?

Thanks!

Feng

nisa's picture
Cypress Employee
408 posts

You can set the interface clock to max frequency/100MHz. You cannot change anything further to change the signal timing. 

291216217_1677336's picture
User
24 posts

Thank you, Nishant.

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