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Problems about the communication between USB and FPGA | Cypress Semiconductor

Problems about the communication between USB and FPGA

Summary: 1 Reply, Latest post by Madhu Sudhan on 18 Sep 2016 02:28 AM PDT
Verified Answers: 0
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18364551326_1671111's picture
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  I used the cyusb3014 communication with FPGA(V-series of Xilinx) and there is no problems. But, now I use the chip of XILINX(K-series) to transfer data with PC,there is some problems. When I connect the USB data line with PC, there is the drive(named Cypress USB Bootloader) . After I download the bit file of my project ,the drive(named Cypress USB Bootloader) is dropped, not become the Cypress USB SreammerExample.  

 I don't know why!

 Surely it doesn't mean that because the K-series of XILINX? I don't think so . But why?


    Does anyone ever meet this issue ?Is there any explanation to that ?


    Thanks for any returns

mady's picture
Cypress Employee
964 posts


There could be a possibility that the interface between FX3 and the K-series board be noisy. FX3 has a mechanism to automatically disconnect the USB, if it is prone to more noise beyond a particular threshold.

Can you please make sure that the schematics and layout recommendations have followed in the board design? Do the GPIF lines have the 22 Ohm series termination resistors on them? Please create a Tech Support case with us for more investigation.


- Madhu Sudhan

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