problem with "slave async fifo 2 bit" | Cypress Semiconductor
problem with "slave async fifo 2 bit"
I am using CYUSB3KIT-001 in co-processor mode, to develop a mass storage device.
I selected the Application example "slaveasyncfifo", and in GPIF programmer, I selected "slave async fifo 2 bit" and "8 bit data bus".
With "Cypress Control Center", In and Out Transfers are successfully tested.
That is showing that the basic communication between Our Micro Controller and CYUSB3KIT-001 is OK. With Cypress provided driver "CYUSB3.SYS", the system is working fine.
Now for the system, I changed the USB driver from "CYUSB3.SYS" to "USBSTOR.SYS"(Windows USB driver).
System is getting INQUIRY SCSI command(31 bytes). In response to that System is sending 36bytes if Inquiry Data and after that System is sending 13 bytes of CSW.
With USB Analyzer tool USBlyzer, Inquiry command CBW(31 bytes) and Inquiry data(36 bytes) are observed. But CSW(13bytes) is not appeared.
System is sending CSW, after the FLAGA signal indicating that it is ready to accept the In data.( NOT FULL or logic 1 ) . Still it is not appeared in Usblyzer.
After 36 bytes of Inquiry data, System perform a commit, since this is a Short Packet.( by asserting PKTEND signal along with last byte and WR signal ). The same is performed to CSW also.
PLease help me to find out a solution for it.
In the document FX3 Programmer's manual, there is a mention about PP register protocol. Is there any document from cypress which explains this PP register protocol?
Can the system perform the communication with CYUSB3KIT-001 with PP REGISTER PROTOCOL, if the CYUSB3KIT-001 is configured in "slave async fifo 2 bit" mode?