OTG: FLAGA/CTL4 GPIO | Cypress Semiconductor
OTG: FLAGA/CTL4 GPIO
We are starting a new project which requires OTG. Looking at the DVK I see that the USB power switch for the OTG support is controlled by a signal named “CTL4_LT”, which through jumpers I assume is controlled by “CTL4_SW”. My confusion is that in the synchronous Slave FIFO interface, CTL4 is the FLAGA pin:
Designing with the EZ-USB FX Slave FIFO Interface:
i. FLAGA: Full flag dedicated to thread0
As a host controller we need to turn on the OTG VBUS, but as a client we use the slave FIFO interface which uses FLAGA. So I’m confused on how to implement the OTG support on the FX3. Thank you for your help.