Missing data during FX3 sending data packets to PC | Cypress Semiconductor
Missing data during FX3 sending data packets to PC
I am running the synchronous slave FIFO firmware in 8 bit GPIF bus mode. I am using an FPGA to write data to the FX3. I am unable to get continuous data streams and the data miss is random. My implementation has two sockets corresponding to THREAD 0 and THREAD 1. My state diagram is described in capture.PNG
Can anyone help me in solving the issue?