issue with small interrupt MPS at super speed | Cypress Semiconductor
issue with small interrupt MPS at super speed
I'm working on a composite device that includes a HID interface, which requires an 8 byte MPS (max packet size) interrupt IN endpoint to send data. The problem is that, when the FX3 is running a super speed, it always sends out more data than the MPS. Specifically, the DMA buffer minimum size is 16 bytes, so it sends 16 bytes, which causes a bus error (and the host controller resets the device). The HID data payload is 16 bytes total, so one might think that just upping the MPS to 16 bytes would work, but the OS's generic HID driver is submitting two 8 byte URBs regardless of the MPS setting, which will then fail with a babble error. This problem doesn't exist when the FX3 is running at high or full speed (using same DMA/buffer firmware code, the device sends in two 8 byte packets). I also threw together a vendor specific (non-HID_ interrupt IN endpoint interface and replicated the problem at 8 bytes (16 bytes is OK since I have control and can submit a 16 byte URB). In any case, AFAICT at this point, this is a bug in the FX3. I haven't found any release notes listing this issue and I'm using the latest 1.2.3 SDK.
Is there any other way I can force an 8 byte packet at super speed or any other workaround for this problem?