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How to customize AN75799 to 32b data and allow download a data block into FPGA? | Cypress Semiconductor

How to customize AN75799 to 32b data and allow download a data block into FPGA?

Summary: 2 Replies, Latest post by lis_user1 on 25 Sep 2016 05:05 PM PDT
Verified Answers: 0
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lis_user1's picture
User
32 posts

I have CYUSB3ACC_005 and Superspeed Explorer Kit, and ZC706. 

My requirement is to transmit 32-b UVC from FPGA and allow quick download a block of control/calibration data (10 MB+) into FPGA via USB3 when the UVC is idle. 

After some research my idea is as follows. Would like to check whether it makes sense. 

1) Change the data width in fx3_uvc.cyfx to 32-bit, add a state machine (DOWNLOAD) to do 2~5. 

2) Add a INTR_FPGA pin to interrupt the Zynq CPU when the FX3 Firmware has a sub-block of control data in EP0. 

3) FX3 Firmware moves state machine by CyU3PGpifSMStart(DOWNLOAD_START) state, wait for 1ms. 

4) Zynq CPU instructs FPGA to control READ pin and read 32-bit data. 

5) Repeat 2/4 until all 10MB data is transmitted. 

6) Move state machine to UVC by CyU3PGpifSMStart (START_SCK0, ALPHA_START_SCK0);

 

mady's picture
Cypress Employee
1095 posts

Hi,

For changing the state machine you need to use CyU3PGpifDisable (1); to disable the current state machine, CyU3PGpifLoad (DOWNLOAD), to load the new state machine and then CyU3PGpifStart.

Also, make sure that the DMA Channels are also modified (or make sure that the DMA Channels are suitable for the new state machine also. You might have to destroy the old DMA Channel and create new channel for the new state machine, if necessary (according to your design. )

Your approach is fine.

Regards,

- Madhu Sudhan

 

lis_user1's picture
User
32 posts

Thank you! 

 

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