GPIO signal synchronized to the GPIF clock input | Cypress Semiconductor
GPIO signal synchronized to the GPIF clock input
I am using GPIF interface as a synchronous slave FIFO input. The transmission is initiated by the FX3 by pulsing a GPIO line. However the trigger signal must be synchronized to the GPIF clock rather than the FX3s main clock in this design. How can I ensure the IO buffer of a spare GPIF CTLx pin is still using the GPIF clock source after I override it to use it as a simple IO within the firmware?