GPIF II Designer Update Anytime Soon? | Cypress Semiconductor
GPIF II Designer Update Anytime Soon?
Any chance of an improvement to GPIF II Designer? It is almost unusable.
1) Better timing diagrams that associate sampling of address/data with states - at present, one is forced to insert dummy states to try to work out relationships
2) For shared address/data, note whether addess or data was sampled.
3) For bi-directional busses, showing the data direction would obviously be useful.
4) Better user interface for zoom/pan of timing diagram - having to enter start/end times is ridiculous