GPIF II & data acquisition | Cypress Semiconductor
GPIF II & data acquisition
For one of our project, we are keen to use the FX3 chip and the GPIF engine to send/receive data on two parallel bus.
My question is as follow: is it possible to create a 24 bits data bus and use the 12 lower bits (from 0 to 11) to push data on bus and use the 12 upper bits (12 to 23) to retrieve data from bus ? The idea is to use the GPIF as an aggregator of the two concurrent 12 bits data path through a single USB port.