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fx3 Watermark callback | Cypress Semiconductor

fx3 Watermark callback

Summary: 1 Reply, Latest post by Madhu Sudhan on 19 Jun 2016 01:43 PM PDT
Verified Answers: 0
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The problem that we have observed is that when doing large transfers (bigger than the buffer space available on the fx3) if the pc has a high cpu load it has be seen to struggle to keep up with transfers. This causes the input to the dma buffers to catch up with the output and causes an error. This can be recovered from and the transfer can be started again, however the first transfer was still a failure. In time dependent applications this can cause issues as the usb timeout set on the pc has to wait to elapse before a new transfer is initiated.

The DMA watermark is well documented with regard to using hardware flags but due to the aforementioned problem we have a requirement where the DMA watermark needs to generate an interrupt/callback.  We have sufficient time to take action to slow down the transfer into the gpif block if we are running out of buffer space but this has to be done in firmware. Our application is using an auto many to one dma channel from 2 pib sockets to one usb endpoint socket, with the gpif configured to have a 16bit data bus with data clocked in from an external source. The transfer is of known finite size, though that size can vary from transfer to transfer, but it always begins with data placed into the same socket (0). We can poll the DMA transfer status to get the number of produced buffers and the number of consumed buffers, however this is processor intensive and  we have unknown latency in the time taken to poll the dma transfer and calculate how full the buffers are.This means we have to set the threshold for taking action to slow down the transfer into the gpif block much lower than the total buffer space (each thread has 4 x 16384 byte buffers). 

The technical reference manual refers to DSCR_IS_LOW in the SCK_INT register as an interrupt when the socket descriptor counter is below the socket descriptor watermark.  This looks like the best function for our application but we can not find any reference documentation on the descriptor counter or its associated watermark and interrupts. Is any one able to help on this or some other means of generating interrupts on DMA watermarks.  Our possible fall back position is to link the watermark flags to GPIO inputs and interrupt on change of port but this requires hardware changes and we are already running low on I/O.

mady's picture
Cypress Employee
964 posts


In case of auto channels, it is not advisable to follow DSCR_IS_LOW or the SCK_INT.

You may make the FPGA send a ZLP (by asserting PKTEND) when it sees FX3 busy (by means of watermark flag). The ZLPs tell the PC that the transfers have finished.


- Madhu Sudhan

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