Is it possible to use the full 32 bit data widt in the slave FIFO interface to achieve higher data rates?
Yes. With 32-bit bus width we should be able to achieve higher data rate.
OK, this sounds fine. Is there a documentation regarding the GPIF registers? The slave fifo examples are 16 bit bus with, also the application note always speaks about 16 bit. At the moment we are developing a samtec cable connection to our existing hardware, so we can provide 32 data lines. Schould we wait for an update of the application note?
The generation of waveform descriptor can be done through GPIF II programmer. This and the 32-bit width firmware will be released through the SDK.
Will update the forum once the release is made.