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DMA flag problem | Cypress Semiconductor

DMA flag problem

Summary: 1 Reply, Latest post by RSKV on 11 Sep 2013 01:25 AM PDT
Verified Answers: 0
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I--Will's picture
16 posts

 I‘m using usb3.0 to do my camera system. Now I meet a problem. when I use FPGA transmit data to FX3, I find the full flag is set to low which meens DMA buffer is full. But I don't want this, if I read data fast enough in PC, could it be possible that this flag is not set to low. In a word, I want a ceaseless data transfer, but the full flag stop me.

rskv's picture
Cypress Employee
1134 posts


 Full flag will not be a problem for you if you are using two GPIF II threads to get data into FX3 and if PC can match the input data rate.

You can refer to AN75779 for two thread implementation. But if you are BULK transfers then there can be a case where your DMA buffers get filled with data and waiting for IN requests from PC host. There you can not avaoid this full flag problem.

Please let me know if you have any more questions on this.


sai krishna.



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