Dealing with transitory Synchronous Slave FIFO Overruns | Cypress Semiconductor
Dealing with transitory Synchronous Slave FIFO Overruns
Summary: 3 Replies, Latest post by Mpls_Bob on 27 Mar 2012 07:49 AM PDT
Verified Answers: 1
13 Mar 2012 08:21 AM PDT#1
What would be a reasonable way to detect transitory buffer overruns without using external hardware configured as a synchronous slave FIFO connected directly to an external imager?.
I would like to interface an external imager to the FX3 without any external hardware. The general timings of the imager satisfies the interface requirements of the synchronous slave FIFO configuration.
I can configure the size of the ram buffers to be evenly divisible the imager line size ensuring the transition between buffers only occurs during line idle time. However, I need to handle the error case where all of the buffers are full when the imager begins to write the next line into the buffer. The occurrence of FIFO FULL, WRN, and CLK may be transitory. The worst case for detection would be a one CLK overlap between the FIFO FULL flag and WRN.
I can add external hardware to detect this case if necessary. However, it would seem reasonable that the FX3 would have the ability to detect this occurrence or deal with the situation w/o requiring external hardware. Is there a way to detect this error occurrence using only the facilities of the FX3?