CYUSB3014-BZXI USB 3.0 Device | Cypress Semiconductor
CYUSB3014-BZXI USB 3.0 Device
I am using Cypress' CYUSB3014 USB 3.0 device controller in my design. I found that the pins L5 & J11 of the device are connected to SRAM_VDD (power rail) in a development kit which used the sama part. My confusion is that whether L5 & J11 are to supply power to the 512 KB embedded SRAM or is it related to 'Boot from GPIF II ASync SRAM mode' as in device's datasheet ? I have attached the development kit (PDF) with this mail. Waiting for your reply.