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CX3 MIPI reset state appears to be wrong | Cypress Semiconductor

CX3 MIPI reset state appears to be wrong

Summary: 1 Reply, Latest post by Nishant Aditya on 10 Mar 2016 04:09 AM PST
Verified Answers: 0
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Terry Platt's picture
3 posts

Hi, We have a CX3, which is operating a Sony CMOS imager and utilising the MIPI data bus. We find that the MIPI reset pad is driven high at start-up and remains that way - apparently preventing MIPI transfers. The pad has a 10K pull-down but is otherwise unconnected. Is the MIPI reset somehow configured as an output, rather than an input? We cannot find any reference to setting its state in the data sheet.



Nishant Aditya's picture
Cypress Employee
38 posts


MIPI reset pulled-up is an expected behaviour. Please refer to the power up sequence on page 10 of the datasheet. It will be low only during the reset period and then it will be pulled up.

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