Clarification on sync slave FIFO timing | Cypress Semiconductor
Clarification on sync slave FIFO timing
I'm trying to understand the difference between dedicated and current thread flags as it relates to the synchronous slave FIFO read/write timing. AN65974 says that for a current thread flag there's a two cycle latency. It doesn't specify read or write although a two cycle latency is consistent with the synchronous slave read timing diagram.
If I use a current thread flag, do I incur an extra two cycle latency in addition to the two cycle latency shown for the dedicated thread flag? If not whats the timing difference between the two.