You are here

Can CTL lines of GPIF II used as simple I/Os? | Cypress Semiconductor

Can CTL lines of GPIF II used as simple I/Os?

Summary: 1 Reply, Latest post by dbir on 30 May 2012 09:53 AM PDT
Verified Answers: 0
Last post
Log in to post new comments.
Rick426's picture
9 posts


I have two questions.

(1) I am designing a data acquisition board using CYUSB3014 chip. I want to use 32bit GPIF II bus for data communication. But not all CTL lines are used. So for the unused CTL lines, can they be seperated as simple I/Os (programmed to generate other independent control signals).

(2) From the newly released GPIF II Designer, it says that when 32 bit data bus is not supported if SPI  is selected. Does it mean that when I am using 32bit data comminucation, I can not use the GPIO [53-56] which associated with SPI pins? Or I can still used those pins as I/O and program them by firmware?


Thank you.



dbir's picture
Cypress Employee
28 posts

Please refer Page#33, Table#16 of FX3 datasheet for IO configuration. Yes, These pins can be used as general purpose IO. You need to use "CyU3PDeviceGpioOverride" API for it. refer cyfxspi.c file of attached project. It also use 32 bit GPIF and IO are control lines are configured as IOs and these IOs are used for software(bit-banged) SPI.

Log in to post new comments.