Advice on New Design | Cypress Semiconductor
Advice on New Design
Hi, I'm designing a usb device around the USB FX3. I have a few questions I hope contributors might be able to help me with:
1) In my application, data transfer speed is is very important. I require at minimum 200 MB/s. From what I've read, the FX3 is more than capable of this, but performance is very host-controller dependent. As I need to acquire a new PC for development, is there any chipset (or even better, laptop from e.g. Dell/Lenovo ) that somebody could recommend?
2) I'm somewhat concerned about PHY errors and the abrupt termination of superspeed transfers (see the related thread). The error rate apparently seems to be heavily dependent on noise from the GPIF switching, cable length, and clock quality. With respect to noise from the GPIF, beyond the obvious preference of 1.8 V over 3.3, is there any specific PCB layout that could mitigate switching noise? I could do some electromagnetic simulations, but if anybody's got any tried and true methods, I 'd be happy to hear about them. Regarding clock quality, I have at my disposal an extremely low jitter LVDS clock that I can program to any frequency (a nice side effect of having ADCs in the design). I would imagine this is my best option (along with very clean clock power). The question then is frequency (19.2, 26, 38.4, or 52 MHz). As I don't know the FX3's internal structure, I can only guess that 52 MHz might possibly result in the lowest jitter in the device's PLL. Is this correct?
Any advice would be very much appreciated!