Address line drive delayed from data and GPIO | Cypress Semiconductor
Address line drive delayed from data and GPIO
Hello! I'm working on a USB-to-GPIF interface and I've noticed a problem. When I have DR_ADDR, DR_DATA, and DR_GPIO actions together in the same state, the data and GPIO lines update immediately as expected but the address lines update one clock-cycle later (with synchronous GPIF). I am using the address counter as the source. Is there a way to fix this to have the address lines drive at the specified time?