32 bit GPIF only 32 bit for bus reads | Cypress Semiconductor
32 bit GPIF only 32 bit for bus reads
I am seeing a weird issue where data is read in properly by the FX3. So IN_DATA is able to capture 32 bits per clock cycle. However, when DR_DATA is called on the GPIF bus only the lower 16 bits of the GPIF bus are asserted. As an example, I have sent a data packet consisting of incrementing bytes "\x00\x01\x02\0x03" to the FX3 via USB. Instead of seeing a single 0x00010203 bus write, I see it come out across 2 separate bus cycles as 0x00000001 and 0x00000203.
I pass the following arguments to CyU3PDeviceConfigureIOMatrix():
io_cfg.useUart = CyTrue;
io_cfg.useI2C = CyFalse;
io_cfg.useI2S = CyFalse;
io_cfg.useSpi = CyFalse;
io_cfg.isDQ32Bit = CyTrue;
io_cfg.lppMode = CY_U3P_IO_MATRIX_LPP_DEFAULT;
Any help is greatly appreciated.