QDRII+ Idd vs usage ratio | Cypress Semiconductor
QDRII+ Idd vs usage ratio
In CY7C2564XV18 datasheet, Idd is specified for 50% read and 50% write cycles (note 24 on p.20).
The QDRII+ having dedicated interfaces for read and write, one can push it to 100% read and 100% write cycles. Then, what happens to the core power? Does Idd double?
Question holds for lower usage. What Idd to expect at 10%?