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Pipelined Sync SRAM | Cypress Semiconductor

Pipelined Sync SRAM

Summary: 1 Reply, Latest post by ajai on 14 Dec 2014 04:31 AM PST
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subashbabu's picture
35 posts


     I have doubt, In 4-Mbit (128 K × 32) Pipelined Sync SRAM(CY7C1339G).  Can i get Sync Sram memory without this pins ADSP, ADSC.  Can I use as a External Memory, If i can than what i have to do with the ADSP, ADSC Pins . All Sync SRAM memory will have these pins. From the datasheet, i came to know that use for direct access with Processor or DMA Controller for example. 

  Which type of Sync SRAM is used for External Memory except QDR,DDR Memories.





ajai's picture
Cypress Employee
76 posts

 Hello Subash,

Are you looking to use the SRAM as a data memory? If you need memories without ADSP and ADSC, can you consider using our Async SRAM? 

Most controllers have internal memory interface circuits to interface with Async SRAM. Depending on your data bus and address bus width, you can consider using one of the following SRAMs available in product selector guide.



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