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CY7C024AV Vcc Ramp Rate | Cypress Semiconductor

CY7C024AV Vcc Ramp Rate

Summary: 1 Reply, Latest post by admu on 16 Jan 2013 12:40 AM PST
Verified Answers: 0
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Tmui's picture
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What is the recommended max and min Vcc ramp rate for the Dual Port RAM CY7C024AV-25AXC?

I am applying 3.3V to Vcc. The ramp up is pretty smooth and it takes about 480us. Occasionally, the right side is locked out of a semaphore after a power up. I am thinking that the Vcc ramp up time may be too fast or too slow.

The symptom is that the right side is being told that the semaphore is taken (write a 0 and read a 1) after power up. It should be free to either side after power up but is being ‘pre-assigned’ to the left side. When the left side circuit is disabled, the right side never gets the semaphore. When the left side is allowed to operate, it eventually accesses and releases the semaphore which sets it free for the right side at that point.

The two semaphore addresses being tested are 010 and 011 (A2, A1 & A0). The symptom can occur to either semaphore.

Only about 1% of the ICs exhibit this problem. And the symptom can occur consistently or intermittently.


Tony Mui

admu's picture
Cypress Employee
8 posts

Dear Mr.Tony Mui,

Thanks for providing the information regarding the issue you have observed. As we understand, the left port is consistently assigned priority for semaphores 2 and 3 on power-up. We would like to understand the state of the control signals Chip Enable (CEL and CER) and Semaphore pin (SEML SEMR) for both the ports on powerup. We also need a few more clarifications regarding the setup to help us understand the cause for this issue.

Since this query is application specific we request you to initiate a technical support case on our website:

Please do provide your E-mail address if you want us to create the case on your behalf.

Thanks & Regards,


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