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What's inside the Pulse Converter component? | Cypress Semiconductor

What's inside the Pulse Converter component?

Summary: 2 Replies, Latest post by jb_1593366 on 09 Sep 2016 02:32 PM PDT
Verified Answers: 1
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jb_1593366's picture
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20 posts

I want basically the same thing, except with asynchronous set from input, and then output is ORed with input so the output pulse length is at least 1 clock cycle, up to the input pulse length.  There's probably a simpler circuit with a flip-flop or something but I couldn't think of it.  Similar to a retriggerable monostable multivibrator

user_1377889's picture
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10706 posts

You could write a small state-machine using an LUT component.

Alternatively build a new component using the UDB-Editor to create a state-machine in verilog. That's a new experience ;-)

 

Bob

jb_1593366's picture
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20 posts

This works:

 

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