Verilog vs Datapath | Cypress Semiconductor
Verilog vs Datapath
I am studying the datapath on the PSoC Sensei blog at the moment, and I was wondering:
In Verilog, there are functions such as shifting, adding, etc. These are the same functions
that the datapath provides. What then is the advantage of using the datapath? Is it that the
datapath is not used by the Verilog synthesizer? I.E. A pure Verilog implementation makes
less efficient use of the UDB, because it does not use the datapath?