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Quad SPI and Dual SPI design? | Cypress Semiconductor

Quad SPI and Dual SPI design?

Summary: 2 Replies, Latest post by hli on 24 Nov 2016 03:53 AM PST
Verified Answers: 1
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Mucit23's picture
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5 posts

Hi

I need a quad spi module. I just started working with Psoc5LP. So I don't know how to design. How can I design this module? 

also I have a questions. Is it possible to do parallel processing on PSoC microcontrollers?

Thank You 

user_1377889's picture
User
9583 posts

Please be a bit (or byte ;-) more precise: Do you need an SPI master that addresses 4 slaves or do you need 4 SPI masters?

Please download and install Creator 4.0. There are examples for SPI and a datasheet for each component.

 

Bob

hli
user_78878863's picture
User
2575 posts

If you mean a SPI component that uses 4 data bits: I think you would need to implement your own component (in Verilog). You can combine multiple UDBs into one with a larger data width if you need to.

Depending on the feature set could do this with the already existing basic blocks (muxes, shift registers and DFFs).

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