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PSOC 4 Datasheet | Cypress Semiconductor

PSOC 4 Datasheet

Summary: 2 Replies, Latest post by danaaknight on 16 Jan 2014 05:34 PM PST
Verified Answers: 0
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user_14586677's picture
7646 posts

In the PSOC 4 datasheet the CM input range for SAR is stipulated as

Vss to Vdda, should it be Vssa to Vdda ?


Also in TRM no discussion mentioned if SAR is a R ladder solution. Reason

I ask is the linearity specs are only speced for Vref >= 1 V, but if architecture

is R ladder one would think much lower Vrefs would still experience the same

linearity performance ? Or is this related to switch performance in the ladder

mux to decision comparator ?


Regards, Dana.

seg's picture
Cypress Employee
28 posts


1. re VSS vs VSSA, you found a typo. It should indeed be VSSA as this agrees with the TRM and other documentation.

2. The SAR ADC is not a resistive ladder, it a multiple-level switched capacitor type.

---- Dennis

user_14586677's picture
7646 posts

There is another problem in the datasheet, no mention in

absolute max ratings the relationship between Vdda and Vdd

nor Vssa and Vss.


That should be added.


Thanks seg.


Regards, Dana.

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