PSOC 4 Datasheet | Cypress Semiconductor
PSOC 4 Datasheet
In the PSOC 4 datasheet the CM input range for SAR is stipulated as
Vss to Vdda, should it be Vssa to Vdda ?
Also in TRM no discussion mentioned if SAR is a R ladder solution. Reason
I ask is the linearity specs are only speced for Vref >= 1 V, but if architecture
is R ladder one would think much lower Vrefs would still experience the same
linearity performance ? Or is this related to switch performance in the ladder
mux to decision comparator ?