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How to use a Sample And Hold Component at arbitrary times | Cypress Semiconductor

How to use a Sample And Hold Component at arbitrary times

Summary: 1 Reply, Latest post by danaaknight on 02 Oct 2015 04:27 AM PDT
Verified Answers: 0
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pelsoc's picture
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I am trying to use a Sample and hold component to hold constant a voltage in a circuit at certain times. The time period to hold the voltage isn't repetitive and is controlled from the API C code.

I tried doing this by setting the Sample and hold block "Sample clock edge" to "Negative" and the 'Sample mode" to "Sample and Hold".

I can't use use  a clock entrance for "sclk" because I don't want to sample in a repeatative interval. For the sclk input I created a logical control signal that is logical high before I need to hold the signal and is changed to logical low when I need to to Hold constant a new Value from the Vin input. 

This process repeats itself using a code loop that set the logical control signal to '1' in the beginning of each loop iteration

Unfortunately this doesn't seem to work and the Sample and Hold output seems to be stuck at a voltage close to 0V.


Do you have Any Idea how should I use the Sample and hold Component so that it would work properly?




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