How to split Firmware and Component Creation Code (Verilog) | Cypress Semiconductor
How to split Firmware and Component Creation Code (Verilog)
I am newbie and sorry If the same question was asked before.
As I understood, PSoC Creator creates hex file from Firmware and Verilog codes (for Programmable HW Blocks).
I want to create a HW Design and want to pack it. After that I want to develop firmware in different environments. I dont mean export PSoC Project to Eclipse or uVision. I want to port an open source project to PSoC5 and it has own build environment. I want to implement PSoC specific modules for open source project and distribute it with pre-defined HW Design.
Is it possible?
Is there any document that explains hex file creation and Firmware and Programmable HW Block code relations?