GCC: assembler only and detailed memory map file | Cypress Semiconductor
GCC: assembler only and detailed memory map file
not sure if this is the right forum place, my question isn't related to a given device, but the development tools, GCC in this case.
So, after working massively with PSoC4 and a bit with PSoC5, I wan't to dig deeper into the GCC tools. I'm coming from the 8051 world, where it was easy to check the generated assembler code if it was blown unnecessarily. Also the map file was relatively detailed regarding memory location of a given variable or checking the overlay mechanism for local function variables.
Now, how can I get this for the Cortex-M0/M3 devices? Regarding the assembler code, it seems that the generated LST files are the right place, right? They're not always easy to read, but I assume this is getting better with experience.
The MAP file makes more headache, it doesn't give me the informations I expected based on my experience with 8051 map files... So, the question is: is this related to the different memory architecture or is there simply a linker switch which outputs more details? For example, the 8051 map file showed up the memory type (which doesn't exists on a Cortex-Mx device due to the linear address space), the address, etc., but I can't find those informations for local function variables, only for globals - is this because global variables are created on the HEAP, which is dynamic?
And the third question: let's say I wan't to create an assembler only project to get knowledge of the instruction set, how can I create such a project?