Capacitors are not Linear | Cypress Semiconductor
Capacitors are not Linear
This post should really belong on a section of forum for general electrical
issues, I am requesting a new topic area be added to forum. That being said
see the video discussed below, very informative.
Take a look at this youtube video on C dependence on bias voltage.
C dependence on its applied V, both DC and RMS, not new but rarely discussed,
or shown in datasheets in any meaningful way. Kind of like the single rail input
stage crossover distortion of OpAmps, rarely highlighted in datasheets.
Even more troubling note the discussion on how the C does not follow its own exponential
behaviour, gets very non linear. In a control loop, like use as a S/H cap, stability issues
come to mind, let alone accuracy of loop.
Needless to say if we have any of this stuff in signal path and are trying to achieve 20 bits
with DelSig, good luck.
Qualify your capacitors in short is the advice. In the very least, for bulk bypass, consider
specifiying values 2 X or more than what you need because of typical loss of C due to bias