AR Configuration Error ? | Cypress Semiconductor
AR Configuration Error ?
From datasheet -
soc – Input *
The start of conversion (soc) is an optional pin. You see it if you select the Hardware Trigger
sample mode. A rising edge on this input starts an ADC conversion. If this input is high when the
SAR_Start() function is called, a conversion will start immediately. After the first conversion, a
rising edge on the input will start an ADC conversion. This signal should be synchronized to the
ADC_SAR clock. If you set the Sample Mode parameter to Free Running, this I/O is hidden.
Seems to say if I select HW trigger SOC will show, otherwise hidden. But then it says its only
hidden if I select free running. Below I set to SW trigger, and SOC is showing ?