K, I don't know what happened there...the description block went blank once I submittted. Hmm.
Anyways, I am having a bit of trouble with my little design and I suspect that it has something to do with the configuration of the analog output pin I'm using for "Vout1". The pin is selected to be "high impedance analog" because, well, there don't seem to be any other options for analog pins. The "strong drive" looks to me to be a digital sink/source, not a true class B or AB amplifier. According to the op amp datasheet, if I use the "op amp out" pin, then Vout should be directly connected to the op amp itself...it's all very confusing to this novice user.
The idea with this project is to make an echo effect...audio fro ma mic is amplified, ADCd with a del sig, and DMAed into a circular buffer. The current converted value and a delayed value are added together and then outputted. I've fiddled with this dude with the debugger...it seems I'm getting the amplified audio in, but the VDAC8 via op amp1 doesn't seem to do anything, it's just sitting there outputting 3v (data= 255) to port 0_0. My load impedance is about 300 ohms.
BTW this is a PSoC 5 on a cy8ckit 050, if that makes any difference. Attached is the archive bundle of the project. Any help is much appreciated.
I also noticed, your PGA connections are amping the reference, by a gain of 50,
means 1V x -50 = - 50 V, which of course does not work. Should not the ref voltage
be attached to PGA + in, signal to PGA - ? Defining eq is Vout =Vref + (Vin x Vref) × Gain =~
Vin x G - Vref x G for large G.
Is you input ground referenced, swing +/- about ground ? If so you need to either AC couple
to inputs or use a r network divider to Vdd to allow for - input swings.
Take a look at attached ...
Excel attachment to calc R values .....
I had all of the resistors unconnected because for whatever reason, the program refuses to build when they are in the circuit (you apparently cannot mix "types" and the resistors are "annotation" type, not analog).
Unless I'm totally whacked out here, the 50 gain on the PGA should be fine, because the noninverting PGA references Vref and the summing junction (1st op amp) uses a unity gain on both Vref and Vinput. So, I should be only amplifying the difference between Vref and Vinput, though to some extent I am reliant upon resistor values being fairly tight tolerance. Sorry, the schematic doesn't show this and I should have explained all of that in better detail.
I appreciate your help and I'll have a look at what you did.
I've actually solved the output troubles (I had things connected incorrectly on the dev board...not a big fan of 40 pin IDCs). Now my trouble seems to be white noise, perhaps from the ADC.
Regarding noise, some references I have found useful -
1) Start by using scope on infinite persistence, and look at supply rails to see how
much pk-pk noise you have. Then look at noise BW with a spectrum to see what major
contributing components are.
2) When you run A/D consider shutting off other timer/counters to reduce noise contributors.
3) Same as 2, if driving hi current loads like LEDs, 7 seg displays, heavy C loads, shut that
I/O activity off.
4) Not all capacitors are equal. Look at actual Z vs f curves. Polymer tantalums for bulk much
better than electrolytic or regular tantalums. Use caps with low lead L. Bypass always with bulk +
ceramic s(.1 and .01 uF).
5) Split grounds and analog grounds and rejoin as close to power source as possible.
6) Scope on infinite persistence, look at clock oscillator phase noise to establish if excessive.
7) Band limit the signal chain.
8) Use external reference ground/bypass cap.
9) Reduce hi-z nodes to low z where possible to minimize noise pickup.
10) Some references
Hi, I could not get you project to compile because of a number of errors and unconnected nets.
These might help -