PSoC Today: USB / PSoC 3 pulse generator project and source code | Cypress Semiconductor
PSoC Today: USB / PSoC 3 pulse generator project and source code
In an attempt to get these projects out the world at large, I have decided to post them to the community components forms. Again, not specifically a component, this is the USB function generator application. Source is included for the C# application as well as the PSoC 3 project. Extra information is also included in the zip archive.
This memo includes a PC based function generator, implemented on a PSoC 3 and controlled via a PC App over USB. The function generator app:
Allows complete control over a dual output 16 bit PWM running at up to 66 Mhz.
The PWM clock divider, PWM period, compare1 and compare2 values, and compare modes (LT, LTE, GT, GTE, E) can all be controlled via the App.
Each output can be enabled or disabled independently, or the entire PWM can be disabled.
The second channel‟s compare value can be slaved to the first channel.
The duty cycle can be locked so you can change the frequency without worrying about changing the compare value.
An optional duty cycle limit can be imposed (10% - 90%) on the compare values (preventing full on or full off, a useful safety feature when driving a switching regulator).
The output can be dynamically switched between GPIO (P0 and P0) or SIO pins (P12 and P12)
When using the SIO, the output voltage can be either VDDIO or a variable voltage set by an adjustable DAC controlled via the application.
Each output pin‟s drive mode can also be changed via the app: Strong, open drain drives low, open drain drives high, resistive pull up, resistive pull down, and resistive pull up/down can all be used.
A big thanks to RLRM‟s generic USB HID app note. It was his simplified USB example that made this possible.