PSOC5: independence controller - logic? | Cypress Semiconductor
PSOC5: independence controller - logic?
if i use logic part of PSOC to sample a input signal from a dedicated pin, count it and write result out by using (dedicated) SPI interface. In controller area i do anything else not affecting the componets used for logic.
If (for example) the software do have a deadlock and external watchdogtimer reset the chip, will this affect the logic part? What need to be done for maximum independence for logic part?
Thanks in comon.