PSOC5 GPIO strange behavior | Cypress Semiconductor
PSOC5 GPIO strange behavior
In my project I use PSOC5 FTK.
GPIO strange behavior has been detected. Two subsystems, two problems.
First - IR receiver, connected to P5. In receive cycle (RC6 protocol) there are avalanche interrupt req., 1000 and more. GPIO settings ( CMOS, TTL, pull-up, pull-down and others ) have no effect. Pulses are clear, no noise, no jitter; fronts normal too.
Only with external shmitt trigger (74AHC14) RC receiver work normally. Pulses picture on oscilloscope (after shmitt and before) doesn't differ (omly one - after trigger fronts are little straight).
In second subsystem symptoms are similar. Quadrature encoder misses pulses. (1000 cpr encoder). On 100 full shaft evolutions there are 700 - 800 missed pulses. Oscilloscope picture is very good, no phase shift between channels, no jitter, no noise, fronts very clear. Good encoder. But it works only after 74AHC14 channels signal precondition.
I think, that PSOC5 is super sensitive to signal front duration. Can anyone tell something about it?