PSoC 5LP - USB UART CDC - Unstable/glitchy operation | Cypress Semiconductor
PSoC 5LP - USB UART CDC - Unstable/glitchy operation
We're using a PSoC 5LP with a basic UART CDC driver and code just printing "hello" once a second.
Connected to a Mac we just monitor the output in a Terminal (also tested on a Windows machine via Putty).
After just a few seconds, the usb serial connection drops for unknown reasons. Power scoped and looks good so assume this is something we just missed and/or some timing issue. Not sure though how to best debug further. Hopefully it's something simple...
On the mac-side it looks like this:
07/12/15 16:07:41,000 kernel: USBF: 15199.861 AppleUSBXHCI::DoControlTransfer sync request on workloop thread. Use async!
dumping the registers before (when it works) vs after (when it has died), comparing the two, the only diff is:
USB_SIE_EP3_CR0 became 0x49, which should be bit 6 according to the TRM -> 6 err_in_txn...
The Error in transaction bit is set whenever an error is detected. For an IN transaction, this indicates a no response from HOST scenario. For an OUT transaction, this represents an RxErr (PID error/ CRC error/ bit-stuff error scenario). This bit is cleared by any writes to the register. 0- No errored transactions since bit was last cleared. 1- Indicates a transaction ended with an error.
ps. I double-checked our design against the CY8CKIT-059. Nothing really that can be wrong in terms of how USB is tied up. One difference though is that our VDD* is 1.8 and 3.3V only, not "usb vbus: 5V" as on the kit, but I assume that shouldn't matter right?