hi, can we provide latching through the firmware? How can we do that?
What do you mean by latching ?
1) Single bit capture ? Toggle or D F-F in logic part of digital component catalog
2) Register wide latch Control Register in register part of digital component catalog
3) Lookup Table In logic part of digital component catalog
latch is like when switch is pressed and released once then the fuctions will continue for ever untill the next signal is received. just like latching and holding circuit.
Thanks.. i will try to implement it. will check it if is working or not.
A mechanical switch needs to be debounced, so this combination
should effect a latching -
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http://www.cypress.com/?rID=40974 AN60024 - PSoC® 3, PSoC 4, PSoC 5LP Switch Debouncer and Glitch Filter
If you need a full HW approach use the debouncer with a LUT or D, basically set the D when both press and release
occur. Clear D or LUT under SW or just gen a pulse to indicate key press/release has occured and control other HW
with that pulse.
Hello Dana.. it seems there is some problem in my post " Facing problem with the timer" so i am posting my reply here.
I tried something which u have suggested and implemented the code and it runs.. but for only one cycle. To make it continue should i change the ISR ?
I have uploaded the project.. Please have a look.
Because the Timer is in one shot mode you need to restart it with
Timer_Start( ) in isr.
As an aside normally best practice with isr's is to set a flag and exit, service
in main(), eg. do not call other f()'s inside isr as that results in a lot of stack
push and wasted MIPs and memory.
But adding the start in the isr if your program not suffering from performance
Thanks Dana.. i will rectify myself in the respective points..