DelSig ADC gain error | Cypress Semiconductor
DelSig ADC gain error
Summary: 2 Replies, Latest post by torpe on 29 Mar 2011 04:03 AM PDT
Verified Answers: 0
22 Mar 2011 12:36 PM PDT#1
Testing the DelSig ADC on PSoC First Touch kit, with 0-6*Vref range I get a >5% gain error. With other ranges the error is smaller but still out of spec. Is there any misconfiguration that could cause this or are there silicon errors on ES1?