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Character LCD module can't be dedicated to any port except P2 | Cypress Semiconductor

Character LCD module can't be dedicated to any port except P2

Summary: 6 Replies, Latest post by danaaknight on 13 Oct 2015 07:32 AM PDT
Verified Answers: 1
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user_503520769's picture
2 posts

Hi, everyone!

I'm just getting familiar with PSoC 5LP architecture and faced with some difficulties during implementation of character LCD.

It is stated in datsheet that output bus of CharLCD module can be dedicated to any port.

I'm using 16x2 HD44780 compatible LCD. It works properly only at P2. When connected to any other port LCD stays blank.  But I need to use display at P0(6:0). LCD was connected in the following order(works good):

P2.0 - Data 0

P2.1 - Data 1

P2.2 - Data 2

P2.3 - Data 3

P2.4 - Enable

P2.5 - RegSelect

P2.6 - Read/Write

Desirable connection I tried (this one was not successful):

P0.0 - Data 0

P0.1 - Data 1

P0.2 - Data 2

P0.3 - Data 3

P0.4 - Enable

P0.5 - RegSelect

P0.6 - Read/Write

Of course, I change CharLCD dedicated port and make a build each time I connect the display to new pins. Also it can not be a firmware (code problem) "coz same situation happens even with a tutorial projects.

What is the matter?


Some further info: my evaluation board is CY8CKIT-059 with CY5888LT1-LP079. Character LCD module version is 2.1

user_14586677's picture
7646 posts

Looking at schematic looks like a couple of those pins have bypass caps

on them.


Regards, Dana.

user_242978793's picture
966 posts

You have learned a lesson of using the PSoC kits they have a lot of uses and Cypress tries make sure you can use the kit for all types of functions. This causes issues when you need to use a lot of pins in a row like the LCD component.  So it is better to look for one of the LCD devices that work on I2C so you can use just about any free pin and you only need a few pins.  They made a Component for the PSoC 4 that you can use any pin on any port to drive the LCD component. I have found this component to be very useful for a lot of projects.  It doesn't work on the PSoC 5 devices however. In your own design you can get around these issues as you are defining the Pins and your design would not have these restrictions.


user_1377889's picture
9283 posts

Since port0 is mostly used for analog purposes there have been mase some things easier for the user. To stabilize tnternal and external reference voltages there are 1.0µF capacitors (C9, C12, C13) connected to some Port0 pins as Dana already stated. Unsolder those caps or use (preferred) other pins.



user_14586677's picture
7646 posts

Those caps are for - System Capacitors

There are seven capacitors on the PSoC 5LP Prototyping Kit, used when ADC operation at high
frequencies, CapSense or external 32kHz crystal oscillator is required in the application.

■ Four ADC bypass capacitors: Required for proper ADC sampling at higher frequencies:
❐ C9 and C12 - For two SAR ADCs
❐ C7 and C13 - For Delta Sigma ADC

■ A CapSense capacitor (CMOD): Required for proper CapSense functionality.

■ Two biasing capacitors: Required for interfacing an external 32kHz crystal oscillator. These
capacitors are added in the Rev *A version of the PSoC 5LP Prototyping Kit.


And you can see on schematic what cap is used with which pin.


Regards, Dana.

user_503520769's picture
2 posts

Thanks, guys! You helped a lot.

Yes, I have to be pretty more attentive and look through the schematics before asking at the forum.

However, thank you all for fast and helpful  response. This topic can be closed.

user_14586677's picture
7646 posts

Glad to help.


Regards, Dana.

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