SWD as GPIO and J-LNK | Cypress Semiconductor
SWD as GPIO and J-LNK
Hi, While trying to test hibernation of Psoc5LP (cy8c5868axi-032LP) to minimize power consumption I have lost the device. This means J-LINK is unable to detect the device over SWD. I configured the SWD pins as GPIO as suggested by power management in order to obtain lowest possible power consumption. The SWD port shoult be possible waken up after reset and the GPIO pins will be SWD again. But I fail to access the SWD port with J-LINK programmer.
I wonder if there is some trick that the programmer must do and the J-LINK does not do that. Any experience?
I attached the project that will brick the device for me in order you can see maybe there is something else wrong too. I have carefully verified the bricking flag of firmware protection.