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Strange problems when sampling GPIO ports | Cypress Semiconductor

Strange problems when sampling GPIO ports

Summary: 3 Replies, Latest post by Sakamuri on 12 Apr 2011 03:10 PM PDT
Verified Answers: 0
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user_78878863's picture
2553 posts

For my PSoC challenge project, I need to sample a GPIO port (to have a logic analyzer). I encountered some strange behaviors when doing that. I'm using a combination of LUTs for the trigger logic, which are driven by 2 registers (one for the bit mask, one for the compare values). My test circuit is a 8-bit-counter, running with about 6 kHz. The port I'm trying to sample is P3 (since it is available on the prototyping area).

My first version was using DMA for the GPIO data to memory. When doing so, only the bits which are not selected for trigger comparision are transferred properly - all other bits are set to the trigger compare value. To make it even more strange - the counter output seems to be distributed to the non-masked bits (meaning the the first bit not selected for trigger gets counter Q0, the second non-selected gets Q1 and so on) - which clearly isn't how I have connected the wires.

When I replace all the DMA logic with just a simple PWM timer to generate interupts, and sample via a Port_Read() call, these problems go away, but all bits are inverted.

In both cases I have routed the internal signals back to another port, and connected another logic analyzer. These signals are always fine (not inverted, not mixed up).

Has someone an idea what might happen here?

dasg's picture
Cypress Employee
730 posts

Hi hli,


Can you please attach the project so that I can try it out at my end.

As of now, I am unable to figure out the cause of error.


user_78878863's picture
2553 posts

I have uploaded the projects as and . They include the complete project, the logic analyzer client and my documentation (as I had it written for the contest). If you have any question on how to operate it, don't hesitate to ask me directly.



Sakamuri's picture
3 posts


Any have idea about USBUART in PSOC Design?

I am learning programming on PSOC Design 5.1.

I Have small doubt regarding USB interface?

How can I inerface PSOC with USB as COM port?

I tried to include  USBUART user module somponent as a project dependencies?

is it possible to add as a dependencies to my project?


My goal to to communicate the PSOC with LABVIEW on PC through USB : Is is sounds good?

Please your answer will help me a lot to move forward.

thanks in advance :)





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