You are here

Simultaneous sampling of two channels using sample and hold | Cypress Semiconductor

Simultaneous sampling of two channels using sample and hold

Summary: 18 Replies, Latest post by odissey1 on 30 Nov 2016 07:26 PM PST
Verified Answers: 2
Last post
Log in to post new comments.
Evan D's picture
User
24 posts

Hi,

What is the simplest implementation to sample two analog channels simultaneously using the Delta-Sigma ADC? I was thinking of using two sample and hold components with the output connected to a two channel mux, which is connected to the Delta-Sigma ADC. 

The aim is to collect a number of instantaneous samples and then save them to an sd card. I have seen a counter used to identify when a negative edge occurs. I also thought I might be able to supply a negative edge using logic high/low to the sclk pin but it was having none of that.

Is a counter the easiest implementation (using an interrupt to initiate sampling)?

 

Thanks

Evan D's picture
User
24 posts

Have added a project where I tried to use a counter and an interrupt to capture the same voltage reading from  the same pin - but it didn't work. Can anyone provide feedback why it didn't work?

Thanks.

Evan D's picture
User
24 posts

Hi, Found a project on the cypress website which claims to measure two channels using a Delta Sigma ADC (http://www.cypress.com/knowledge-base-article/measure-two-channels-signa...) . It's quite old so I updated the components and added the interrupts back in for the pwm and counter components but I'm not sure where to set the ISR_ADC_Flag.  If you have an idea  - holla. 

Thanks :)

user_1377889's picture
User
9596 posts

You are leaving us to guess. What exactly works and what does not work?

One thing I can see is that the line

        Counter_ReadStatusRegister();

should be put into the interrupt handler.

Do not forget to declare the variable isr1 as "volatile". For explanation see here.

 

Bob

Evan D's picture
User
24 posts

Hi Bob,

The project displays readings from both channels, and these are regularly updated, just the readings are not the same. The counter is generating an interrupt after the first negative edge. As soon as the interrupt is generated a sample is taken from both channels. Both channels should be in the 'hold' state so the readings should be the same. I tried slowing down the clock that drives the sample and hold components to ensure the next negative edge doesn't arrive before sampling is finished but there was no change (still different).

Cheers 

user_1377889's picture
User
9596 posts

What makes you think that the interrupt occurs at the falling edge of the clock?

Interrupt is set to TC, not capture.

 

Bob

Evan D's picture
User
24 posts

Good catch. I changed it but still have a difference in values. Will continue working on it today.

Thanks

user_342122993's picture
User
580 posts
Evan D's picture
User
24 posts

Wow. I like those links a lot. That will take more time (under the pump right now) but would be way more satisfying!

Thanks 

Magnus Lundin's picture
User
33 posts

You probably need two  sample and hold components, connected to your input pins and then the analog multiplexor connecting these to the ADC.

The sample and hold components triggered at the same time and then read by the ADC in succesion

 

Evan D's picture
User
24 posts

Hi Magnus. That's kind of what I have at the moment (attached the project above). Still not working but will post any progress.

Thanks

Log in to post new comments.