Sample & Hold not giving expected results | Cypress Semiconductor
Sample & Hold not giving expected results
I'm using the sample & hold component in my proyect since I need to sample a signald comming from a photosensor which receives light from a very short pulse of light which comes from an LED.
The problem is that when I use the sample and hold circuit I get a noisy signal compared to the one I get when sampling without the H&S.
In my case I'm turing on the LED, activating the H&S with a Control register connected to the clk input of the sample and hold , then turning of the LED and lastly I use the SAR ADC to sample 64 times the voltage in the sample and hold. I'm sampling 64 times to get a better resolution.
When I omit the S&H the signal is good but then it takes too much time for the ADC to make the 64 samples. If I add the S&H it gets very noisy.
I've checked the TRM which in page 271 shows the Track and Hold diagram and it has a hold cap of 12pF and a voltage follower.
If I use the S&H making just one sample at a time it gets a "smooth" signal.
I think the might be that the S&H might not be holding the voltage enough time to do all the conversions.
I've tried adding a unity gain PGA between the S&H and the ADC with the same results.
Does anyone have any idea why this is happening?