Question about JTAG/SWD pins needed for new design | Cypress Semiconductor
Question about JTAG/SWD pins needed for new design
I'm about to finalise the design of my rover using the CYC5588AXI-060. It's replacing a Zilog eZ80F91 module, which only required 2 debug/programming pins, TCK and TDI (and ground, obviously!).
However, I'm unclear about exactly which pins are required for the SWD mode debug/programming interface. I'd appreciate it if someone could confirm exactly which pins need to be connected to the header for non-JTAG programming. I'd also like to understand if I need to make any changes to the programming routine if only the SWD pins are used. The family and device datasheets mention switching to SWD from the JTAG connection, but not details of which of the common pins need to be connected first. Any help would be appreciated!