PSoC5LP boot detail (blank/erased flash -- what happens?) | Cypress Semiconductor
PSoC5LP boot detail (blank/erased flash -- what happens?)
I have read the various application notes presented in these forums when similar questions come up. The application notes all say that the datasheet explains the boot options for the 5LP, but there is nothing in the datasheet which goes through the 5LP boot sequence. The TRM for the 5LP seems to skip over the stage I am most interested in. I understand that CSP packaged 5LP devices have a factory-installed USB bootloader, but I'm looking at the 100 pin TQFP packaged devices.
It is my understanding that, from the factory, these devices are blank. What I do not see in any of the application notes or the datasheet is positive confirmation of the presence of a ROM bootloader in the 5LP devices. Can someone confirm the device operation when the flash is erased? Does it just halt? i.e. when the boot phase (section 20.3.2 in the TRM) completes, does the 5LP CPU simply start executing instructions from address 0 (section 20.3.3 in the TRM)? What happens if address zero is erased?
AN61290 mentions that SWD or JTAG can be used for programming, and refers to AN60616 regarding the PSoC startup procedure. This application note, however, only details what happens with the program loaded in flash memory. AN73854 seems to indicate that a blank device will simply halt. It instead focuses on the bootloader PSoC object (which of course must be programmed in).
To summarize, I'm looking for information about the in-system programmability of the 5LP devices in their "from the factory" state. What are my options for programming a new device?